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Aplus to Provide Low-Power, Low-Voltage (1.8V) Operation EEPROM Macro Solution at UMC |
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San Jose , CA, August 29, 2005 - Aplus Flash Technology, a privately-held, fabless provider of nonvolatile memory (NVM) products and customized NVM IP, today announced that it has signed an agreement whereby it will develop EEPROM Semiconductor Intellectual Property (IP) for UMC's EEPROM process technology. This effort will provide UMC's foundry customers with access to Aplus' high-performance EEPROM IP and comprehensive support services when designing their IC and System-On-Chip (SoC) products. The Aplus EEPROM memory macro is being built to target applications requiring non-volatile memory storage for program or data, offering flexible page write or in-system byte write/erase functionality with high program/erase cycles. It is designed to operate over a temperature range of -35°C to 85°C. The macro block is also designed to be customized in order to meet various customer requirements for low-power, low-voltage, and high-performance capabilities. This is intended to allow customers the flexibility to utilize the memory to target different specifications for applications such as smart card, SIM card, RFID, security ICs, ID, and other products that require data storage to a byte erasable/programmable level. Ken Liou, director of the IP and Design Support division at UMC, said, "Non-volatile memory plays an important role in a variety of semiconductor industry applications. As such, we are pleased to have Aplus, a valuable IP provider of non-volatile memory solutions, port its non-volatile EEPROM IP to our process technology. We look forward to making their IP solutions available to our customers designing for applications that benefit from EEPROM technology." "Aplus' commitment is to provide foundry flexibility for our NVM IP customers. Our agreement with UMC will make Aplus' leading EEPROM IP more widely available to customers targeting UMC's process technologies," said Peter Lee, CEO of Aplus. "As SoCs grow increasingly complex and the need for non-volatile memory increases, the IP offerings from Aplus ported to UMC's process technology should provide great value in accelerating our customers' time-to-market and reducing their design cycle and risk while enhancing their products' functionality and performance. "
The EEPROM Semiconductor IP is targeted to be available in Q4 of 2005. # # # For more information about Aplus and our product offerings, please contact: Christine Lee
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